Exploiting deterministic TPG for path delay testing
From MaRDI portal
Recommendations
- BIST test pattern generators for two-pattern testing-theory and design algorithms
- scientific article; zbMATH DE number 1941114
- Test generation for path delay faults using binary decision diagrams
- On the number of tests to detect all path delay faults in combinational logic circuits
- Constructing a sequence detecting robustly testable path delay faults in sequential circuits
Cited in
(3)
This page was built for publication: Exploiting deterministic TPG for path delay testing
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q1587342)