Fast hardware-based learning algorithm for binarized perceptrons using CMOS invertible logic
From MaRDI portal
Recommendations
- scientific article; zbMATH DE number 1928651
- Learning with integer weighted functional link preceptron
- Parallel perceptron learning on a single-channel broadcast communication model
- Hardware-amenable structural learning for spike-based pattern classification using a simple model of active dendrites
- scientific article; zbMATH DE number 1962890
This page was built for publication: Fast hardware-based learning algorithm for binarized perceptrons using CMOS invertible logic
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q5869679)