Fault-tolerance analysis of multibus multiprocessor system
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Recommendations
- Design and analysis of fault-tolerant multibus interconnection networks
- An algorithm for routing messages between processing elements in a multiprocessor system which tolerates a maximal number of faulty links
- Performance analysis of multilevel bus networks for hierarchical multiprocessors
- Fault-Tolerant Multiprocessor Link and Bus Network Architectures
- scientific article; zbMATH DE number 913541
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