Fault-tolerance considerations for redundant binary-tree-dynamic random-access-memory (RAM) chips

DOI10.1109/24.126688MaRDI QIDQ4004853zbMATH OpenOpenAlexFDO

Authors B. Ciciani

Publication date 27 September 1992

Published in IEEE Transactions on Reliability (Search for Journal in Brave)

Full work available at URL https://semanticscholar.org/paper/abea44280ff0b4b08f5677e7f662afdade86d1da

Mathematics Subject Classification ID

Reliability, testing and fault tolerance of networks and computer systems (68M15)

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