Fault Detection in Redundant Circuits

DOI10.1109/PGEC.1967.264621MaRDI QIDQ5522663zbMATH OpenFDO

Authors

Publication date 1967

Published in IEEE Transactions on Electronic Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/PGEC.1967.264621

zbMATH Keywords

numerical analysis

Cited in

(3)

• A graph theoretic approach to switching function minimization
• Polynomial-time algorithms for generation of prime implicants
• Boolean function minimization in the class of disjunctive normal forms

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