Generation of Fault Tests for Linear Logic Networks

DOI10.1109/T-C.1972.223433MaRDI QIDQ5638214zbMATH OpenOpenAlexFDO

Authors Melvin A. Breuer

Publication date 1972

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/t-c.1972.223433

Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12)

Cited in

(1)

• Check of linear combination circuits

This page was built for publication: Generation of Fault Tests for Linear Logic Networks

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q5638214)