High Throughput/Gate AES Hardware Architectures Based on Datapath Compression

DOI10.1109/TC.2019.2957355MaRDI QIDQ5125896zbMATH OpenOpenAlexFDO

Authors Rei Ueno, Sumio Morioka, Noriyuki Miura, Kohei Matsuda, M. Nagata, Shivam Bhasin, Yves Mathieu, Tarik Graba, Jean-Luc Danger, Naofumi Homma

Publication date 2 October 2020

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2019.2957355

Mathematics Subject Classification ID

Computer science (68-XX)

Cited in

(1)

• The cost to break SIKE: a comparative hardware-based analysis with AES and SHA-3

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