High level synthesis for loop-based BIST

DOI10.1007/BF02948869MaRDI QIDQ5938664zbMATH OpenOpenAlexFDO

Authors Xiaowei Li, Paul Y. S. Cheung

Publication date 1 October 2001

Published in Journal of Computer Science and Technology (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/bf02948869

zbMATH Keywords

at-speed testingbuilt-in self-test (BIST)data pathhigh-level synthesistest resources reusability

Mathematics Subject Classification ID

Computer system organization (68M99) Computing methodologies and applications (68U99) Fault detection; testing in circuits and networks (94C12)

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Cited in

(4)

• The determination of the cycle length in high level synthesis
• Low-Transition Test Pattern Generation for BIST-Based Applications
• Binary programming-based transparency path construction for SoC test access
• Adaptive bacterial foraging driven datapath optimization: exploring power-performance tradeoff in high level synthesis

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