How to garble mixed circuits that combine Boolean and arithmetic computations
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Cites work
- Candidate iO from homomorphic encryption schemes
- Fast garbling of circuits under standard assumptions
- Flexor: Flexible garbling for XOR gates that beats free-XOR
- Garbling XOR gates ``for free in the standard model
- How to Garble Arithmetic Circuits
- scientific article; zbMATH DE number 1618044 (Why is no real title available?)
- Improved Garbled Circuit: Free XOR Gates and Applications
- New ways to garble arithmetic circuits
- Public-Key Cryptosystems Based on Composite Degree Residuosity Classes
- Secure two-party computation is practical
- Three halves make a whole? Beating the half-gates lower bound for garbled circuits
- Two halves make a whole: reducing data transfer in garbled circuits using half gates
Cited in
(5)- New ways to garble arithmetic circuits
- A unified framework for succinct garbling from homomorphic secret sharing
- Efficient mixed garbling from homomorphic secret sharing and GGM-tree
- Rate-1 arithmetic garbling from homomorphic secret sharing
- \textsf{Zebra}: arithmetic garbled RAM for large words from DCR
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