Improving Tolerance to Variations in Memristor-Based Applications Using Parallel Memristors

DOI10.1109/TC.2014.2308189MaRDI QIDQ2982349zbMATH OpenOpenAlexWikidataFDO

Authors Jeyavijayan Rajendran, Ramesh Karri, Garrett S. Rose

Publication date 16 May 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2014.2308189

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

Cited in

(3)

• Analytical study on the influence of parasitic elements in a memristor
• mrPUF: a novel memristive device based physical unclonable function
• Novel Boosted-Voltage Sensing Scheme for Variation-Resilient STT-MRAM Read

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