Integration of reconfigurable hardware into system level design

MaRDI QIDQ4408241zbMATH OpenFDO

Authors Klaus Buchenrieder, Ulrich Nageldinger, Andreas Pyttel, Alexander Sedlmeier

Publication date 29 June 2003

Full work available at URL http://link.springer.de/link/service/series/0558/bibs/2438/24380987.htm

Mathematics Subject Classification ID

Computing methodologies and applications (68U99)

Recommendations

• HARDWARE/SOFTWARE MODELING OF FPGA-BASED SYSTEMS
• Designing run-time reconfigurable systems with JHDL
• The integration of SystemC and hardware-assisted verification
• Introduction to reconfigurable computing. Architectures, algorithms and applications. Foreword by Reiner Hartenstein.
• Task scheduling in a finite-resource, reconfigurable hardware/software codesign environment

Cited in

(2)

• Embedding of dedicated high-performance ASICs into reconfigurable systems providing additional multimedia functionality
• HARDWARE/SOFTWARE MODELING OF FPGA-BASED SYSTEMS

Describes a project that uses

Uses Software

• Handel-C

This page was built for publication: Integration of reconfigurable hardware into system level design

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q4408241)