Neuro-space mapping technique for semiconductor device modeling (Q1024088)
From MaRDI portal
 | This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: Neuro-space mapping technique for semiconductor device modeling |
scientific article; zbMATH DE number 5565200
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Neuro-space mapping technique for semiconductor device modeling |
scientific article; zbMATH DE number 5565200 |
Statements
Neuro-space mapping technique for semiconductor device modeling (English)
0 references
16 June 2009
0 references
electronic circuit simulation
0 references
neural networks
0 references
semiconductor device modeling
0 references
space mapping
0 references
0.8506795167922974
0 references
0.7623758316040039
0 references
0.7541396617889404
0 references
0.7260879278182983
0 references
0.7198694944381714
0 references
