An algorithm to generate complete test sets for stuck-at faults in combinational logic circuits (Q1101421)
From MaRDI portal
scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | An algorithm to generate complete test sets for stuck-at faults in combinational logic circuits |
scientific article |
Statements
An algorithm to generate complete test sets for stuck-at faults in combinational logic circuits (English)
0 references
1988
0 references
algorithm
0 references
stuck-at faults
0 references
combinational logic circuits
0 references
fault simulation
0 references
component connection model
0 references
