A single-machine, single-wafer-processing, multiple-lots-per-carrier scheduling problem to minimize the sum of lot completion times (Q1762129)
From MaRDI portal
 | This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: A single-machine, single-wafer-processing, multiple-lots-per-carrier scheduling problem to minimize the sum of lot completion times |
scientific article; zbMATH DE number 6107571
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | A single-machine, single-wafer-processing, multiple-lots-per-carrier scheduling problem to minimize the sum of lot completion times |
scientific article; zbMATH DE number 6107571 |
Statements
A single-machine, single-wafer-processing, multiple-lots-per-carrier scheduling problem to minimize the sum of lot completion times (English)
0 references
15 November 2012
0 references
single machine
0 references
wafer fabrication
0 references
multiple-lots-per-carrier
0 references
single-wafer-processing
0 references
branch-and-bound
0 references
completion time
0 references
\texttt{CPLEX 12.2}
0 references
0 references
0 references
0 references
0.8577033
0 references
0.8515174
0 references
0.84872156
0 references
0.84717745
0 references
0.84609276
0 references
0.84604883
0 references
0.8449396
0 references
0.84367967
0 references
