Formal verification of parallel prefix sum and stream compaction algorithms in CUDA (Q2120963)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 7501976
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Formal verification of parallel prefix sum and stream compaction algorithms in CUDA |
scientific article; zbMATH DE number 7501976 |
Statements
Formal verification of parallel prefix sum and stream compaction algorithms in CUDA (English)
0 references
1 April 2022
0 references
GPU verification
0 references
CUDA
0 references
deductive verification
0 references
separation logic
0 references
prefix sum
0 references
stream compaction
0 references
0 references
0.7469301819801331
0 references
0.7331300377845764
0 references
0.7067325711250305
0 references
0.6704542636871338
0 references
0.6697835326194763
0 references
