Reconfigurable signal processing and hardware architecture for broadband wireless communications (Q2501730)
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scientific article; zbMATH DE number 5052555
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| default for all languages | No label defined |
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| English | Reconfigurable signal processing and hardware architecture for broadband wireless communications |
scientific article; zbMATH DE number 5052555 |
Statements
Reconfigurable signal processing and hardware architecture for broadband wireless communications (English)
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12 September 2006
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reconfigurable signal processing
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broadband communications
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software-defined radio
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cyclic prefix
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frequency-domain equalization
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0.7387708425521851
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0.7205654382705688
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0.6810486912727356
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