A novel design methodology for high-performance programmable decoder cores for AA-LDPC codes (Q2508513)

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A novel design methodology for high-performance programmable decoder cores for AA-LDPC codes
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    A novel design methodology for high-performance programmable decoder cores for AA-LDPC codes (English)
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    13 October 2006
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    LDPC codes
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    turbo-decoding message-passing algorithm
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    Ramanujan graphs
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    VLSI decoder architectures
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