Divergent stutter bisimulation abstraction for controller synthesis with linear temporal logic specifications (Q2665348)
From MaRDI portal
 | This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: Divergent stutter bisimulation abstraction for controller synthesis with linear temporal logic specifications |
scientific article; zbMATH DE number 7430138
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Divergent stutter bisimulation abstraction for controller synthesis with linear temporal logic specifications |
scientific article; zbMATH DE number 7430138 |
Statements
Divergent stutter bisimulation abstraction for controller synthesis with linear temporal logic specifications (English)
0 references
19 November 2021
0 references
control synthesis
0 references
computational issues
0 references
controller constraints and structure
0 references
abstraction
0 references
LTL specification
0 references
0 references
0 references
0 references
0.7545109987258911
0 references
0.7513473033905029
0 references
0.7489295601844788
0 references
0.7465502619743347
0 references
0.7444565892219543
0 references
