Enabling cutting-edge semiconductor simulation through grid technology (Q3068909)
From MaRDI portal
 | This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use this page instead for the normal view: Enabling cutting-edge semiconductor simulation through grid technology |
scientific article; zbMATH DE number 5838107
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Enabling cutting-edge semiconductor simulation through grid technology |
scientific article; zbMATH DE number 5838107 |
Statements
Enabling Cutting-Edge Semiconductor Simulation through Grid Technology (English)
0 references
18 January 2011
0 references
nanoCMOS electronics
0 references
virtual organization
0 references
security
0 references
variability
0 references
0.6838400959968567
0 references
0.6583619117736816
0 references
0.6580209732055664
0 references
