Understanding retiming through maximum average-delay cycles (Q4277377)
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scientific article; zbMATH DE number 495450
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | Understanding retiming through maximum average-delay cycles |
scientific article; zbMATH DE number 495450 |
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Understanding retiming through maximum average-delay cycles (English)
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31 October 1994
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synchronous circuit
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minimum clock period
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unit-delay circuitry
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combinational circuitry
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