Realizability conditions and bounds on synthesis of switched-capacitor DC-DC voltage multiplier circuits (Q4361385)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 1079856
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Realizability conditions and bounds on synthesis of switched-capacitor DC-DC voltage multiplier circuits |
scientific article; zbMATH DE number 1079856 |
Statements
Realizability conditions and bounds on synthesis of switched-capacitor DC-DC voltage multiplier circuits (English)
0 references
28 October 1997
0 references
switched-capacitor dc-dc voltage multiplier circuits
0 references
Fibonacci number
0 references
circuit
0 references
0.6995375156402588
0 references
0.6945411562919617
0 references
0.673333466053009
0 references
0.6713476777076721
0 references
