Performance evaluation of multiple input-queued ATM switches with PIM scheduling under bursty traffic (Q4553067)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 1798052
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | Performance evaluation of multiple input-queued ATM switches with PIM scheduling under bursty traffic |
scientific article; zbMATH DE number 1798052 |
Statements
Performance evaluation of multiple input-queued ATM switches with PIM scheduling under bursty traffic (English)
0 references
1 May 2003
0 references
multiple input-queued asynchronous transfer mode switches
0 references
scheduling
0 references
queueing model
0 references
bursty traffic
0 references
0.7886051535606384
0 references
0.7797653675079346
0 references
0.7776353359222412
0 references
0.776177167892456
0 references
