Charge-mode parallel architecture for vector-matrix multiplication (Q4553223)
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scientific article; zbMATH DE number 1798156
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| English | Charge-mode parallel architecture for vector-matrix multiplication |
scientific article; zbMATH DE number 1798156 |
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Charge-mode parallel architecture for vector-matrix multiplication (English)
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25 November 2002
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analog array processors
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analog-to-digital conversion (ADC)
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charge-injection device (CID)
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dynamic random-access memory (DRAM)
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support vector machines (SVM)
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vector-matrix multiplication (VMM)
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vector quantization (VQ)
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0.7617025375366211
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0.7017157077789307
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