High speed modular systolic array-based DTCWT with parallel processing architecture for 2D image transformation on FPGA (Q5365371)
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scientific article; zbMATH DE number 6787540
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | High speed modular systolic array-based DTCWT with parallel processing architecture for 2D image transformation on FPGA |
scientific article; zbMATH DE number 6787540 |
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High speed modular systolic array-based DTCWT with parallel processing architecture for 2D image transformation on FPGA (English)
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6 October 2017
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dual-tree complex wavelets
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systolic array
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pipelined architecture
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FPGA implementation
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parallel architecture
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