A hardware architecture for the LZW compression and decompression algorithms based on parallel dictionaries (Q5960769)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 1729801
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | A hardware architecture for the LZW compression and decompression algorithms based on parallel dictionaries |
scientific article; zbMATH DE number 1729801 |
Statements
A hardware architecture for the LZW compression and decompression algorithms based on parallel dictionaries (English)
0 references
26 June 2002
0 references
LZW algorithm
0 references
PDLZW algorithm
0 references
compression
0 references
decompression
0 references
0.7839910387992859
0 references
0.7620071172714233
0 references
0.7562515735626221
0 references