A VLSI architecture of the square root algorithm for V-BLAST detection (Q851220)
From MaRDI portal
!
This is the item page for this Wikibase entity, intended for internal use and editing purposes. Please use the normal view instead:
scientific article; zbMATH DE number 5073824
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
||
| English | A VLSI architecture of the square root algorithm for V-BLAST detection |
scientific article; zbMATH DE number 5073824 |
Statements
A VLSI architecture of the square root algorithm for V-BLAST detection (English)
0 references
17 November 2006
0 references
VLSI
0 references
ASIC
0 references
MIMO
0 references
BLAST
0 references
square root algorithm
0 references
fixed-point
0 references
CORDIC
0 references
3G
0 references
HSDPA
0 references
wireless LAN
0 references
0.7521490454673767
0 references
0.7237899899482727
0 references
0.7159760594367981
0 references
0.7083834409713745
0 references
0.7022658586502075
0 references
