Semi-formal verification of the steady state behavior of mixed-signal circuits by SAT-based property checking (Q947801)

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Semi-formal verification of the steady state behavior of mixed-signal circuits by SAT-based property checking
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    Semi-formal verification of the steady state behavior of mixed-signal circuits by SAT-based property checking (English)
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    7 October 2008
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    mixed-signal
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    formal verification
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    property checking
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    VHDL behavioral description
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