An efficient hardware accelerator architecture for implementing fast IMDCT computation (Q985619)
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scientific article; zbMATH DE number 5764579
| Language | Label | Description | Also known as |
|---|---|---|---|
| default for all languages | No label defined |
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| English | An efficient hardware accelerator architecture for implementing fast IMDCT computation |
scientific article; zbMATH DE number 5764579 |
Statements
An efficient hardware accelerator architecture for implementing fast IMDCT computation (English)
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6 August 2010
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hardware accelerators
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inverse modified discrete cosine transform
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type-IV discrete cosine/sine transform
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type-II inverse discrete cosine transform
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0.7768127918243408
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0.7668175101280212
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0.7566285133361816
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0.7372869849205017
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0.7294378876686096
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