Load-balancing data prefetching techniques

DOI10.1016/S0167-739X(00)00056-XMaRDI QIDQ4538496zbMATH OpenFDO

Authors Chihung Chi, Junli Yuan

Publication date 14 July 2002

Published in Future Generation Computer Systems (Search for Journal in Brave)

Full work available at URL http://scholarbank.nus.edu.sg/handle/10635/38906

zbMATH Keywords

cacheload-balancingmemoryprefetch bufferprefetching

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Recommendations

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Cited in

(8)

• Dynamic memory instruction bypassing
• Using the first-level caches as filters to reduce the pollution caused by speculative memory references
• Effective hardware-based data prefetching for high-performance processors
• Content-based prefetching: initial results
• Experiments with sequential prefetching
• A programmable memory hierarchy for prefetching linked data structures
• Exploiting the prefetching effect provided by executing mispredicted load instructions
• Minimizing average schedule length under memory constraints by optimal partitioning and prefetching

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