Logic circuit design. Selected methods

DOI10.1007/978-3-642-27657-6MaRDI QIDQ5389926zbMATH OpenOpenAlexFDO

Authors Shimon Peter Vingron

Publication date 23 April 2012

Full work available at URL https://doi.org/10.1007/978-3-642-27657-6

zbMATH Keywords

logic circuitZhegalkin normal formverification treeNOR-gatesNAND-gatesMoore-type sequential automatonmintermMealy-type sequential automatonmaxtermasynchronous sequential circuitlatchesKarnaugh mapHuffman flow tableessential hazardEccles-Jordan latchesdelayed feedbackcombinational circuit

Mathematics Subject Classification ID

Introductory exposition (textbooks, tutorial papers, etc.) pertaining to information and communication theory (94-01)

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