Low roundoff noise of two sparse second-order balanced realization-based structures

DOI10.1007/S00034-024-02880-2MaRDI QIDQ6927135zbMATH OpenFDO

Authors Chaogeng Huang, Hai-Yan Wu, Yanhong Chen, Houqi Zhang, Haiyu Song

Publication date 22 September 2025

Published in Circuits, Systems, and Signal Processing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/S00034-024-02880-2

zbMATH Keywords

filter structurehardware architecturesquantization errorsroundoff noisestate-space realization

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12) Analytic circuit theory (94C05)

Cites work

• A Generalized Lattice Filter for Finite Wordlength Implementation With Reduced Number of Multipliers
• A Matrix Factorization-Based Structure for Digital Filters
• An improved orthogonal digital filter structure
• Hardware-aware design of multiplierless second-order IIR filters with minimum adders
• scientific article; zbMATH DE number 46484 (Why is no real title available?)
• Minimum uncorrelated unit noise in state-space digital filtering
• On the sensitivity of linear state-space systems
• Optimal FWL design of state-space digital systems with weighted sensitivity minimization and sparseness consideration
• Parametrizations in control, estimation and filtering problems: accuracy aspects
• Synthesis of minimum roundoff noise fixed point digital filters
• Very Robust Low Complexity Lattice Filters

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