Minimal Three-Variable NOR and NAND Logic Circuits

DOI10.1109/PGEC.1965.264064MaRDI QIDQ5523327zbMATH OpenFDO

Authors W. H. Specker

Publication date 1965

Published in IEEE Transactions on Electronic Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/PGEC.1965.264064

zbMATH Keywords

numerical analysis

Cited in

(2)

• Sampling from discrete Gaussians for lattice-based cryptography on a constrained device
• Une méthodologie du calcul hardware des fonctions élémentaires

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