Multirate hierarchical time integration for electronic circuits

DOI10.1002/PAMM.200510381MaRDI QIDQ3177140zbMATH OpenOpenAlexFDO

Authors Arie Verhoeven, A. El Guennouni, Th. Beelen, Jan ter Maten

Publication date 26 July 2018

Published in PAMM (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1002/pamm.200510381

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

Recommendations

• Terminal current interpolation for multirate time integration of hierarchical IC models
• Hierarchical Mixed Multirating in Circuit Simulation
• scientific article; zbMATH DE number 665478
• BDF compound-fast multirate transient analysis with adaptive stepsize control
• Multirate methods for the transient analysis of electrical circuits

Cited in

(8)

• Multirate ROW methods and latency of electric circuits
• Substrate modeling based on hierarchical sparse circuits
• Multirate time integration of field/circuit coupled problems by Schur complements
• Domain decomposition based multirating and its perspective in circuit simulation
• Terminal current interpolation for multirate time integration of hierarchical IC models
• Stability analysis of the BDF Slowest-first multirate methods
• Hierarchical Mixed Multirating in Circuit Simulation
• Automatic Partitioning for Multirate Methods

This page was built for publication: Multirate hierarchical time integration for electronic circuits

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3177140)