ON SIMULATING A CLASS OF PARALLEL ARCHITECTURES

DOI10.1142/S0129054106003711MaRDI QIDQ3379515zbMATH OpenFDO

Authors Mario J. Pérez-Jiménez, Rodica Ceterchi

Publication date 6 April 2006

Published in International Journal of Foundations of Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1142/S0129054106003711

zbMATH Keywords

dynamic communication graphsmembrane computingparallel architectures

Mathematics Subject Classification ID

Network design and communication in computer systems (68M10) Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Parallel algorithms in computer science (68W10)

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Cites work

• scientific article; zbMATH DE number 3858396 (Why is no real title available?)
• The power of communication: P systems with symport/antiport

Cited in

(17)

• Efficient simulations of simple models of parallel computation by time- bounded ATMs and space-bounded TMs
• Parallel simulation by multi-instruction, longest-path algorithms
• Computing the Maximum Bisimulation with Spiking Neural P Systems
• scientific article; zbMATH DE number 996551 (Why is no real title available?)
• scientific article; zbMATH DE number 3936558 (Why is no real title available?)
• A PARALLEL DEMAND-DRIVEN SIMULATION ALGORITHM FOR SIMD COMPUTERS
• scientific article; zbMATH DE number 578414 (Why is no real title available?)
• scientific article; zbMATH DE number 1756645 (Why is no real title available?)
• Modeling cost/performance of a parallel computer simulator
• Execution-driven simulation of multiprocessors
• scientific article; zbMATH DE number 1424440 (Why is no real title available?)
• scientific article; zbMATH DE number 4197388 (Why is no real title available?)
• Simulating the Bitonic Sort Using P Systems
• Simulating synchronous processors
• A hybrid approach for the modelling and simulation of a virtually shared memory parallel computer architecture
• Fast deterministic simulation of computations on faulty parallel machines
• Parallel implementations of streamline simulators

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