On interprocess communication and the implementation of multi-writer atomic registers
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Cites work
- scientific article; zbMATH DE number 554488 (Why is no real title available?)
- Betweenness, orders and interval graphs
- Constructing 1-writer multireader multivalued atomic variables from regular variables
- Constructing two-writer atomic registers
- How to share concurrent wait-free variables
- Modeling concurrency with partial orders
- On interprocess communication. I: Basic formalism
- The elusive atomic register
Cited in
(10)- Two-bit messages are sufficient to implement atomic read/write registers in crash-prone systems
- Time-efficient read/write register in crash-prone asynchronous message-passing systems
- Parallel Processing and Applied Mathematics
- Linear-time snapshot implementations in unbalanced systems
- Self-stabilizing timestamps
- Optimal multi-writer multi-reader atomic register
- Self-stabilizing \(\ell\)-exclusion
- Multiword atomic read/write registers on multiprocessor systems
- Time and space optimal implementations of atomic multi-writer register
- scientific article; zbMATH DE number 4119595 (Why is no real title available?)
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