Eduard Cerny

MaRDI QIDQ1391938zbMATH OpenFDO

List of research outcomes

This list is not complete and representing at the moment only items from zbMATH Open and arXiv. We are working on additional sources - please check back here soon!

Publication	Date of Publication	Type
Comparing generic state machines	2024-04-29	Paper
scientific article; zbMATH DE number 5181788 (Why is no real title available?)	2007-08-22	Paper
Model Checking for a First-Order Temporal Logic Using Multiway Decision Graphs (MDGs) The Computer Journal	2004-11-19	Paper
On the non-termination of MDG-based abstract state enumeration Theoretical Computer Science	2003-07-30	Paper
scientific article; zbMATH DE number 1324665 (Why is no real title available?)	1999-08-17	Paper
scientific article; zbMATH DE number 1241510 (Why is no real title available?)	1999-01-18	Paper
Solving linear, min and max constraint systems using CLP based on relational interval arithmetic Theoretical Computer Science	1998-07-23	Paper
Fault tolerance in a class of sorting networks IEEE Transactions on Computers	1994-01-01	Paper
scientific article; zbMATH DE number 139807 (Why is no real title available?)	1993-03-28	Paper
Letter to the editors: Algorithm for the graph-partitioning problem using a problem transformation method CAD. Computer-Aided Design	1992-10-26	Paper
Built-In Testing of One-Dimensional Unilateral Iterative Arrays IEEE Transactions on Computers	1984-01-01	Paper
scientific article; zbMATH DE number 3693169 (Why is no real title available?)	1980-01-01	Paper
Synthesis of Minimal Binary Decision Trees IEEE Transactions on Computers	1979-01-01	Paper
Controllability and Fault Observability in Modular Combinational Circuits IEEE Transactions on Computers	1978-01-01	Paper
An Approach to Unified Methodology of Combinational Switching Circuits IEEE Transactions on Computers	1977-01-01	Paper
scientific article; zbMATH DE number 3606370 (Why is no real title available?)	1977-01-01	Paper
Comments on "Equational Logic IEEE Transactions on Computers	1976-01-01	Paper
A Computer Algorithm for the Synthesis of Memoryless Logic Circuits IEEE Transactions on Computers	1974-01-01	Paper

Research outcomes over time

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