| Publication | Date of Publication | Type |
|---|
New Low-Area Designs for the AES Forward, Inverse and Combined S-Boxes
IEEE Transactions on Computers | 2020-12-14 | Paper |
New Multiplicative Inverse Architectures Using Gaussian Normal Basis
IEEE Transactions on Computers | 2019-08-13 | Paper |
Keymill: side-channel resilient key generator, a new concept for SCA-security by design
| 2018-02-16 | Paper |
Bit-Serial and Bit-Parallel Montgomery Multiplication and Squaring over GF(2^m)
IEEE Transactions on Computers | 2017-08-08 | Paper |
Concurrent Structure-Independent Fault Detection Schemes for the Advanced Encryption Standard
IEEE Transactions on Computers | 2017-07-27 | Paper |
Concurrent Error Detection in Montgomery Multiplication over Binary Extension Fields
IEEE Transactions on Computers | 2017-07-27 | Paper |
A Low-Power High-Performance Concurrent Fault Detection Approach for the Composite Field S-Box and Inverse S-Box
IEEE Transactions on Computers | 2017-07-27 | Paper |
Efficient and High-Performance Parallel Hardware Architectures for the AES-GCM
IEEE Transactions on Computers | 2017-07-12 | Paper |
Low-Complexity Multiplier Architectures for Single and Hybrid-Double Multiplications in Gaussian Normal Bases
IEEE Transactions on Computers | 2017-07-12 | Paper |
Multiple-Bit Parity-Based Concurrent Fault Detection Architecture for Parallel CRC Computation
IEEE Transactions on Computers | 2017-05-16 | Paper |
scientific article; zbMATH DE number 6716371 (Why is no real title available?)
IEEE Transactions on Computers | 2017-05-16 | Paper |
Comments on “Low-Latency Digit-Serial Systolic Double Basis Multiplier over $GF(2^{m})$ Using Subquadratic Toeplitz Matrix-Vector Product Approach”
IEEE Transactions on Computers | 2017-05-16 | Paper |
New Regular Radix-8 Scheme for Elliptic Curve Scalar Multiplication without Pre-Computation
IEEE Transactions on Computers | 2017-05-16 | Paper |
New Architectures for Digit-Level Single, Hybrid-Double, Hybrid-Triple Field Multiplications and Exponentiation Using Gaussian Normal Bases
IEEE Transactions on Computers | 2017-05-16 | Paper |
High-Speed Hybrid-Double Multiplication Architectures Using New Serial-Out Bit-Level Mastrovito Multipliers
IEEE Transactions on Computers | 2017-05-16 | Paper |
On countermeasures against fault attacks on elliptic curve cryptography using fault detection
Information Security and Cryptography | 2013-07-09 | Paper |
A modified low complexity digit-level Gaussian normal basis multiplier
Arithmetic of Finite Fields | 2010-07-20 | Paper |
On low complexity bit parallel polynomial basis multipliers.
Lecture Notes in Computer Science | 2010-03-09 | Paper |
Digit-Serial Structures for the Shifted Polynomial Basis Multiplication over Binary Extension Fields
Arithmetic of Finite Fields | 2008-08-19 | Paper |
A new construction of Massey-Omura parallel multiplier over GF(2/sup m/)
IEEE Transactions on Computers | 2007-01-09 | Paper |
scientific article; zbMATH DE number 2085208 (Why is no real title available?)
| 2004-08-09 | Paper |
scientific article; zbMATH DE number 1979306 (Why is no real title available?)
| 2003-09-11 | Paper |
scientific article; zbMATH DE number 1583947 (Why is no real title available?)
| 2001-12-16 | Paper |
