P. V. Ananda Mohan

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Person:427736

Available identifiers

zbMath Open mohan.p-v-anandaMaRDI QIDQ427736

List of research outcomes





PublicationDate of PublicationType
Comments on “Avoiding the Gain-Bandwidth Trade Off in Feedback Amplifiers”2021-08-26Paper
Reverse converters for the moduli set \(\{2^n, 2^{n-1}-1,2^{n}-1, 2^{n+1}-1\}\) (\(n\) even)2019-11-08Paper
RNS-to-Binary Converters for Two Four-Moduli Sets <formula formulatype="inline"><tex>$\{2^{n}-1,2^{n},2^{n}+1,2^{{n}+1}-1\}$</tex></formula> and <formula formulatype="inline"><tex>$\{2^{n}-1,2^{n},2^{n}+1,2^{{n}+1}+1\}$</tex></formula>2017-11-20Paper
Reverse conversion using core function, CRT and mixed radix conversion2017-09-25Paper
Residue number systems. Theory and applications2016-06-22Paper
VLSI analog filters. Active RC, OTA-C, and SC2012-06-15Paper
Sensitivity analysis of third and fourth-order filters2010-10-06Paper
Novel first-order and second-order current-mode filters using multiple-output operational transconductance amplifiers2010-05-21Paper
Reverse converters for a new moduli set \(\{2^{2n} - 1, 2^{n}, 2^{2n} + 1\}\)2007-09-03Paper
Fast algorithms for implemention of Montgomery's modular multiplication technique2005-04-05Paper
https://portal.mardi4nfdi.de/entity/Q44284682003-09-15Paper
Comments on ``The digit parallel method for fast RNS to weighted number system conversion for specific moduli \((2^k -1, 2^k, 2^k +1)\)2001-12-02Paper
Comments on ``Residue-to-binary converters based on new Chinese remainder theorems.2001-12-02Paper
Fast VLSI architectures using nonredundant multibit recoding for computing AY mod N2000-07-06Paper

Research outcomes over time

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