Guido Masera

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List of research outcomes

This list is not complete and representing at the moment only items from zbMATH Open and arXiv. We are working on additional sources - please check back here soon!

Publication	Date of Publication	Type
VLSI Implementation of a Multi-Mode Turbo/LDPC Decoder Architecture IEEE Transactions on Circuits and Systems I: Regular Papers	2021-08-26	Paper
Result-Biased Distributed-Arithmetic-Based Filter Architectures for Approximately Computing the DWT IEEE Transactions on Circuits and Systems I: Regular Papers	2021-08-26	Paper
A 2.63 Mbit/s VLSI Implementation of SISO Arithmetic Decoders for High Performance Joint Source Channel Codes IEEE Transactions on Circuits and Systems I: Regular Papers	2021-08-26	Paper
VLSI Implementation of a Non-Binary Decoder Based on the Analog Digital Belief Propagation IEEE Transactions on Signal Processing	2018-08-22	Paper
Power Control for Crossbar-Based Input-Queued Switches IEEE Transactions on Computers	2017-07-12	Paper
Unequal Error Protection of Memories in LDPC Decoders IEEE Transactions on Computers	2017-05-16	Paper
Look-ahead sphere decoding: algorithm and VLSI architecture IET Communications	2013-10-18	Paper
Non-recursive \(\mathrm{MAX}^{\ast}\) operator with reduced implementation complexity for turbo decoding IET Communications	2013-10-18	Paper
Efficient VLSI implementation of soft-input soft-output fixed-complexity sphere decoder IET Communications	2013-10-18	Paper
Multiplierless Mumford and Shah functional implementation Circuits, Systems, and Signal Processing	2011-05-25	Paper
Novel JPEG 2000 compliant DWT and IWT VLSI implementations Journal of VLSI signal processing systems for signal, image and video technology	2003-08-25	Paper
scientific article; zbMATH DE number 1941085 (Why is no real title available?)	2003-06-29	Paper

Research outcomes over time

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