Larysa Titarenko

Available identifiers

Publication	Date of Publication	Type
Reducing the number of LUTs for Mealy FSMS with state transformation	2024-07-04	Paper
Improving the LUT count for mealy FSMS with transformation of output collections	2022-11-23	Paper
Logic synthesis for VLSI-based combined finite state machines. Synthesis targeting ASICs, CPLDs and FPGAs	2022-10-01	Paper
Improving characteristics of LUT-based mealy FSMs	2021-05-03	Paper
Hardware reduction for LUT-based Mealy FSMs	2018-10-22	Paper
Logic synthesis for finite state machines based on linear chains of states. Foundations, recent developments and challenges	2017-12-04	Paper
Signal processing for adaptive antenna arrays.	2011-08-01	Paper
Control and adaptation in telecommunication systems. Mathematical foundations	2011-06-24	Paper
https://portal.mardi4nfdi.de/entity/Q3084239	2011-03-15	Paper
Logic synthesis for compositional microprogram control units	2008-10-22	Paper

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