Bud Mishra

Available identifiers

List of research outcomes

Publication	Date of Publication	Type
The mischief of math. Short stories of clowns, contortionists, and court-jesters. Illustrated by Alexander Lu	2024-09-10	Paper
Coins, Covid, Keynes and K-shaped recovery	2022-06-01	Paper
CAPRI: Efficient Inference of Cancer Progression Models from Cross-sectional Data	2014-08-19	Paper
Cancer hybrid automata: model, beliefs and therapy	2014-06-06	Paper
Inferring tree causal models of cancer progression with probability raising	2013-11-25	Paper
Algorithmic algebraic model checking. III: Approximate methods	2013-10-07	Paper
Multiple testing of causal hypotheses	2012-12-08	Paper
High Performance Computing - HiPC 2003	2009-08-11	Paper
Inclusion dynamics hybrid automata	2009-02-03	Paper
SEPA: Approximate Non-subjective Empirical p-Value Estimation for Nucleotide Sequence Alignment	2008-12-09	Paper
Decidable Compositions of O-Minimal Automata	2008-11-20	Paper
A New Approach to the Estimation of Inter-Variable Correlation	2008-09-24	Paper
Algebraic Systems Biology: Theses and Hypotheses	2007-11-29	Paper
Translating Time-Course Gene Expression Profiles into Semi-algebraic Hybrid Automata Via Dimensionality Reduction	2007-11-29	Paper
Algorithmic Algebraic Model Checking IV: Characterization of Metabolic Networks	2007-11-29	Paper
Shrinkage-based similarity metric for cluster analysis of microarray data	2005-07-19	Paper
https://portal.mardi4nfdi.de/entity/Q4417490	2003-07-29	Paper
False Positives in Genomic Map Assembly and Sequence Validation	2003-04-06	Paper
Placing Probes along the Genome Using Pairwise Distance Data	2003-04-06	Paper
Partitioning single-molecule maps into multiple populations: Algorithms and probabilistic analysis	2001-03-17	Paper
On the Dynamic Finger Conjecture for Splay Trees. Part I: Splay Sorting log n-Block Sequences	2000-10-18	Paper
An NL hierarchy	1992-06-27	Paper
https://portal.mardi4nfdi.de/entity/Q3743254	1987-01-01	Paper
Automatic Verification of Sequential Circuits Using Temporal Logic	1986-01-01	Paper
Hierarchical verification of asynchronous circuits using temporal logic	1985-01-01	Paper
https://portal.mardi4nfdi.de/entity/Q3329397	1984-01-01	Paper

Research outcomes over time

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