Pipelined area-efficient digit serial divider

DOI10.1016/S0165-1684(03)00132-4MaRDI QIDQ948231zbMATH OpenOpenAlexFDO

Authors A. E. Bashagha

Publication date 16 October 2008

Published in Signal Processing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/s0165-1684(03)00132-4

zbMATH Keywords

addersdigit serial arithmeticdividerstwo's complement architectures

Mathematics Subject Classification ID

Signal theory (characterization, reconstruction, filtering, etc.) (94A12)

Recommendations

• VLSI generalised digit serial architecture for multiplication, division and square root
• Computational Science and Its Applications – ICCSA 2004
• scientific article; zbMATH DE number 1542822
• scientific article; zbMATH DE number 3862439
• Very-high radix division with prescaling and selection by rounding

Cited in

(2)

• VLSI generalised digit serial architecture for multiplication, division and square root
• scientific article; zbMATH DE number 1751925 (Why is no real title available?)

This page was built for publication: Pipelined area-efficient digit serial divider

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q948231)