Phase error dynamics of a class of modified second-order digital phase-locked loops in the background of cochannel interference
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Publication:1017101
DOI10.1016/J.SIGPRO.2005.03.002zbMATH Open1160.94315OpenAlexW1999894800MaRDI QIDQ1017101FDOQ1017101
Authors: Tanmoy Banerjee, B. C. Sarkar 
Publication date: 18 May 2009
Published in: Signal Processing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.sigpro.2005.03.002
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- Phase error dynamics of a class of DPLLs in presence of cochannel interference
- Application of time-delayed feedback control techniques in digital phase-locked loop
- Chimeras in digital phase-locked loops
- Some advances and refinements in digital phase-locked loops (DPLLs).
- A new dynamic gain control algorithm for speed enhancement of digital-phase locked loops (DPLLs)
- Combined effects of frequency quantization and additive input noise in a first-order digital PLL
- Recognition of noisy images by PLL networks
- Bifurcation, chaos and their control in a time-delay digital tanlock loop
- Conventional and extended time-delayed feedback controlled zero-crossing digital phase locked loop
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