Neuro-space mapping technique for semiconductor device modeling

DOI10.1007/S11081-007-9024-0zbMATH Open1165.78314OpenAlexW2037983258MaRDI QIDQ1024088FDOQ1024088

Authors: J. Martínez 

Publication date: 16 June 2009

Published in: Optimization and Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s11081-007-9024-0

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zbMATH Keywords

neural networksspace mappingsemiconductor device modelingelectronic circuit simulation

Mathematics Subject Classification ID

Learning and adaptive systems in artificial intelligence (68T05) Technical applications of optics and electromagnetic theory (78A55)

Cited In (2)

• A knowledge‐based neuromodeling using space mapping technique: Compound space mapping‐based neuromodeling
• Modeling semiconductor devices by using neuro space mapping

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