High-performance hardware of the sliding-window method for parallel computation of modular exponentiations

DOI10.1007/s10766-009-0108-7zbMath1186.68072OpenAlexW2125096162MaRDI QIDQ1039216

Nadia Nedjah, Luiza de Macedo Mourelle

Publication date: 27 November 2009

Published in: International Journal of Parallel Programming (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10766-009-0108-7

zbMATH Keywords

modular exponentiationpartitioning strategymodular multiplicationsliding-window method

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Computer system organization (68M99)

Related Items (2)

Parallel modular exponentiation using load balancing without precomputation ⋮ Energy efficient modular exponentiation for public-key cryptography based on bit forwarding techniques

Cites Work

• Modular Multiplication Without Trial Division
• A method for obtaining digital signatures and public-key cryptosystems
• Three hardware architectures for the binary modular exponentiation: sequential, parallel, and systolic
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