Full simulation coverage for SystemC transaction-level models of systems-on-a-chip
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Publication:1041294
DOI10.1007/s10703-009-0075-zzbMath1186.68127MaRDI QIDQ1041294
L. Maillet-Contoz, Florence Maraninchi, C. E. Helmstetter
Publication date: 2 December 2009
Published in: Formal Methods in System Design (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10703-009-0075-z
scheduling; simulation; runtime verification; system-on-a-chip; test coverage; dynamic partial order reduction; loose timing; translational modeling
68N99: Theory of software
Uses Software