Deadlock avoidance for systolic communication

DOI10.1016/0885-064X(88)90023-4MaRDI QIDQ1104743zbMATH OpenFDO

Authors H. T. Kung

Publication date 1988

Published in Journal of Complexity (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0885-064X(88)90023-4

zbMATH Keywords

deadlock avoidanceparallel processing systemqueue bufferingsystolic communication model

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Theory of operating systems (68N25) Grammars and rewriting systems (68Q42)

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Cited in

(5)

• A deadlock-free communication kernel for loop architecture
• Dealing with final state sensitivity for synchronous communication
• scientific article; zbMATH DE number 3949689 (Why is no real title available?)
• scientific article; zbMATH DE number 7314999 (Why is no real title available?)
• Deadlock-freeness of hexagonal systolic arrays

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