Complexity theory of parallel time and hardware
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Publication:1116695
DOI10.1016/0890-5401(89)90009-6zbMath0666.68045OpenAlexW1998855954MaRDI QIDQ1116695
Patrick W. Dymond, Stephen A. Cook
Publication date: 1989
Published in: Information and Computation (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/0890-5401(89)90009-6
parallel computationparallel complexitycomplexity classescircuit depthcircuit widthaggregate hardwareaggregate time
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Related Items (7)
Parallel pointer machines ⋮ A generalization of Spira's theorem and circuits with small segregators or separators ⋮ Bounded size dictionary compression: SC\(^{k}\)-completeness and NC algorithms. ⋮ Improving \(3N\) circuit complexity lower bounds ⋮ Cyclic Boolean circuits ⋮ Data independence of read, write, and control structures in PRAM computations ⋮ Arithmetizing classes around {\textsf{NC}}\(^{1}\) and {\textsf{L}}
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