Routing in VLSI-layout

DOI10.1007/BF02080203MaRDI QIDQ1179413zbMATH OpenOpenAlexFDO

Authors B. Froleyks, Bernhard Korte, Hans Jürgen Prömel

Publication date 26 June 1992

Published in Acta Mathematicae Applicatae Sinica. English Series (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/bf02080203

zbMATH Keywords

combinatorial optimization techniquesVLSI-logic-chips

Mathematics Subject Classification ID

Combinatorics in computer science (68R05) Applications of graph theory to circuits and networks (94C15) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cites work

• scientific article; zbMATH DE number 3936534 (Why is no real title available?)
• On Steiner Minimal Trees with Rectilinear Distance
• The Rectilinear Steiner Tree Problem is $NP$-Complete

Cited in

(4)

• On routing in VLSI design and communication networks
• VLSI routing in polynomial time
• Switchbox routing in VLSI design: Closing the complexity gap
• Solving VLSI design and DNA sequencing problems using bipartization of graphs

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