-regular temporal logic and its model checking problem

DOI10.1016/0304-3975(92)90012-5MaRDI QIDQ1199535zbMATH OpenOpenAlexFDO

Authors Kiyoharu Hamaguchi, Hiromi Hiraishi, S. Yajima

Publication date 16 January 1993

Published in Theoretical Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0304-3975(92)90012-5

zbMATH Keywords

\(\omega\)-regular setscomplexityexpressive powerfairnessformal verification of finite state machinesinfinitary regular temporal logicmodel checking

Mathematics Subject Classification ID

Modal logic (including the logic of norms) (03B45) Other applications of logic (03B80) Formal languages and automata (68Q45)

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Cites work

• Automatic Verification of Sequential Circuits Using Temporal Logic
• Hardware Specification with Temporal Logic: An Example
• scientific article; zbMATH DE number 3497806 (Why is no real title available?)
• scientific article; zbMATH DE number 4119598 (Why is no real title available?)
• scientific article; zbMATH DE number 3237829 (Why is no real title available?)
• scientific article; zbMATH DE number 3311755 (Why is no real title available?)
• Testing and generating infinite sequences by a finite automaton

Cited in

(3)

• An algorithmic approach for checking closure properties of temporal logic specifications and -regular languages
• A Hierarchical Completeness Proof for Propositional Interval Temporal Logic with Finite Time
• On the Model Checking Problem for Some Extension of CTL*

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